The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2001
Filed:
Aug. 05, 1998
Applicant:
Inventor:
Koji Abe, Kawasaki, JP;
Assignee:
Fujitsu Limited, Kawasaki, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract
A LSI layout designing apparatus which is implemented by a computer and designs a layout of a LSI on a display screen includes a timing adjusting unit for carrying out a timing adjustment process with respect to logic circuit data of the LSI already subjected to a layout process, and a layout restoration unit for restoring an original layout of the LSI prior to the timing adjustment process and reflecting a change of cells caused by the timing adjustment process on the original layout which is displayed on the display screen.