Computer system and method employing speculative snooping for optimizing performance

Abstract

A computer system includes a bus bridge which provides an interface between a processor bus, a main memory and a peripheral bus such as a PCI or AGP bus. When a cycle to memory is initiated on the PCI or AGP bus by a peripheral device, a snoop control circuit of the bus bridge arbitrates for the processor bus to initiate a snoop cycle which corresponds to the line being accessed by the peripheral device. In addition to performing a snoop for the current line being accessed, the snoop control circuit further advantageously runs a speculative snoop cycle for the next sequential line. By performing a speculative snoop cycle on the CPU bus to the next line address, latencies associated with subsequent accesses to memory by the peripheral device may be reduced if the device performs a subsequent sequential access. Furthermore, since the bus bridge performs multiple snoop cycles per arbitration cycle (e.g., multiple snoop cycles are effectuated with only one BPRI_assertion), bandwidth on the CPU bus may be optimized since a CPU bus arbitration cycle may be avoided for the snoop to the sequential line address.