Cmos active pixel sensor using a pinned photo diode

Abstract

Circuit architecture of an x-y addressable image sensor, in particular to that of a Complementary Metal Oxide Semiconductor (CMOS) active pixel sensor (APS). A substrate having an area divided into a plurality of pixel areas arranged in a series of rows and columns, having at least one control area separate from the pixel areas; a pinned photodiode formed in at least one of the pixel areas of the substrate; a readout transistor integrated on the pixel area of the substrate and operatively coupled to the pinned photodiode through a transfer gate and a charge to voltage converter; a row selection circuit having at least one selection transistor integrated on the substrate in the area for selecting the pixel area; a column selection circuit for selecting a group of pixels, the selection circuit formed in one of the control areas separate from the pixel areas, the selection circuit further comprising a column readout circuit including a double delta sampling circuit formed from a process that is compatible with CMOS technology; and a reset mechanism for resetting the floating diffusion. The present invention further comprises the use of overlapping gates to reduce the overall size requirements.