The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 20, 2001
Filed:
Oct. 15, 1999
Jean-Yves Michel, Vallauris, FR;
Abstract
A circuit arrangement and method for testing the differential non-linearity (DNL) of a digital-to-analog converter (DAC) determines whether the digital-to-analog converter has an analog output that is monotonic, and thus the DAC is functional The design is appropriate for being implemented on an integrated circuit containing a digital-to-analog converter, creating an efficient self-test circuit arrangement. A counter generates a monotonic sequence of digital input codes for a digital input of the digital-to-analog converter. A monotonicity comparator, such as a one-stage or multistage sample and hold circuit arrangement, detects any non-monotonic transition in the analog output of the digital-to-analog converter, generating an error signal as an output. An output switch, such as a digital flip-flop, may be set by the error signal, for monitoring by other devices. A clock signal synchronizes the counter and the monotonicity comparator. A reset signal may be included to reset the counter to the first digital input code in the sequence, The reset may also reset the output switch.