The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2001

Filed:

Aug. 31, 1998
Applicant:
Inventors:

Kazuaki Oishi, Kawasaki, JP;

Kimitoshi Niratsuka, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 2/536 ;
U.S. Cl.
CPC ...
H04L 2/536 ;
Abstract

A device for suppressing spurious signals generated by a fractional-N synthesizer. The fractional-N synthesizer generates an output frequency where an underlying PLL circuit uses a frequency divider for dividing the output frequency by a frequency-division ratio to obtain a comparison frequency and performs phase-comparison operations between a reference frequency and the comparison frequency to control the output frequency. The output frequency is changed by a frequency interval smaller than the reference frequency by making a temporal change to the frequency-division ratio once in every predetermined number of cycles. The device for suppressing spurious signals includes a current-generation unit which generates an electrical current proportional to a value representing an ordinal position of a current cycle in the every predetermined number of cycles, and a current-summation unit which adds the electrical current to another electric current controlling the output frequency in synchronism with the phase-comparison operations for a duration proportional to a cycle of the output frequency.


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