Wiring substrate with thermal insert

Abstract

A wiring substrate with reduced thermal expansion. A wiring substrate, such as a laminated PWB, thin film circuit, lead frame, or chip carrier accepts an integrated circuit, such as a die, a flip chip, or a BGA package. The wiring substrate has a thermal expansion reduction insert in a thermal expansion stress region where the integrated circuit is mounted. The thermal expansion reduction insert may extend a selected distance from the edge or edges of the integrated circuit attachment area, or stop a selected distance from the edge or edges of the integrated circuit attachment area, or be essentially equal to the integrated circuit attachment area. The thermal expansion reduction insert reduces the thermal expansion of the wiring substrate in the region that is joined to the integrated circuit, thus reducing thermal stress between components of the wiring substrate-integrated circuit assembly. In a specific embodiment, the wiring substrate is a laminated printed wiring board with the thermal expansion reduction insert in a layer next to an outer layer to which the integrated circuit is joined (mounted). In a further embodiment the thermal stress reduction insert is a CIC insert or a copper-molybdenum insert. In an alternative embodiment, the wiring substrate is a thin film substrate or a VLSI substrate.