The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 13, 2001

Filed:

Jan. 18, 2001
Applicant:
Inventors:

Vadim V. Ivanov, Tucson, AZ (US);

Shilong Zhang, Tucson, AZ (US);

Gregory H. Johnson, Tucson, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 ;
U.S. Cl.
CPC ...
H03F 3/45 ;
Abstract

An operational amplifier includes an input stage (,) receiving an input signal (Vin) and having first (,) and second (,) output terminals, and also includes an output stage (,) having a pull-up transistor (M,) and a pull-down transistor (M,). The pull-up transistor has a source coupled to a first supply voltage (V,), a gate coupled to the first output terminal (,), and a drain coupled to an output conductor (,) conducting an output signal (Vout). The pull-down transistor (M,) has a source coupled to a second supply voltage (V,), a gate coupled to the second output terminal (,), and a drain coupled to the output conductor (,). An AB control circuit (,) is coupled between the gates of the pull-up transistor and a pull-down transistor. A first overload recovery circuit (X) is coupled between the output conductor (,) and the gate of the pull-up transistor for limiting the voltage on the gate of the pull-up transistor in response to the output voltage (Vout) when the output voltage is within a first predetermined range of the first supply voltage (V,). A second overload recovery circuit (Y) is coupled between the output conductor (,) and the gate of the pull-down transistor for limiting the voltage on the gate of the pull-down transistor in response to the output voltage (Vout) when the output voltage is within a second predetermined range of the second supply voltage (V,).


Find Patent Forward Citations

Ivanov, Vadim. (2001). Overload recovery circuit and method (U.S. Patent No. 6317000). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6317000

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…