The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 06, 2001

Filed:

Jul. 17, 1998
Applicant:
Inventors:

Philip A. Bunker, Orem, UT (US);

Stuart Biddulph, Provo, UT (US);

Richard L. Sawyer, Orem, UT (US);

Vance D. Campbell, Orem, UT (US);

David C. Andrus, Provo, UT (US);

Assignee:

World Wireless Communications, Inc., Salt Lake City, UT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/707 ;
U.S. Cl.
CPC ...
H04B 1/707 ;
Abstract

Synchronized receiver circuitry and methods are provided for a spread-spectrum communications system which includes a transmitter for generating a data-modulated carrier signal encoded with a predetermined discrete-stepped, cyclical pseudo-random noise code sequence, and a receiver for despreading and demodulating the encoded spread-spectrum modulated carrier signal. The receiver has a pseudo-random noise code generator, a mixer connected to the pseudo-random noise code generator for mixing the encoded spread-spectrum modulated carrier signal with the code sequence provided by the pseudo/random noise code generator to despread the carrier signal, and an indicator in the receiver for generating a received signal strength indicator analog signal. The synchronized receiver includes a clock which provides a frequency output corresponding to the frequency of the clock driving the pseudo-random noise code generator in the transmitter. The synchronized receiver also has an analog-to-digital converter for converting the analog signal to a digital signal indicative of the best correlation between the frequency and PN phase of the transmitted modulated carrier signal and the received modulated carrier signal. The synchronized receiver also includes decoding circuitry connected to the clock and the analog-to-digital converter for sampling the analog signal received at each of a plurality of discrete steps in the PN code, and code chips for determining the peak step when the sampled signal reaches its maximum strength during the code sequence and chip partial period, and for aligning the receiver code sequence with the transmitted code sequence.


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