The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 06, 2001
Filed:
Aug. 03, 2000
Takaya Maruyama, Tokyo, JP;
Hisayasu Satoh, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
In cases where a direct-current offset occurs in a differential signal output from a differential signal amplifier when a differential input signal is differentially amplified in a series of differential signal amplifiers, a direct-current offset component amplified is included in a differential signal output from a particular differential signal amplifier. To suppress the direct-current offset component, the differential signal is, at first, differentially amplified in a pair of transistors of a detecting amplifier, the direct-current offset component is extracted in a low-pass filter from the differential signal amplified, and compensating currents produced according to the direct-current offset component are input to a differential signal amplifier preceding to the particular differential signal amplifier to adjust the direct-current offset component of the differential signal to zero. Because the pair of transistors of the detecting amplifier inevitably have a high input impedance, the differential signal can be directly received in the detecting amplifier, so that the low-pass filter can be formed on a minimized layout area without considering its input impedance. Therefore, a multi-stage signal amplifying circuit can be manufactured on a small layout area while preventing a voltage level of the differential signal from exceeding an input dynamic range of the differential signal amplifiers.