Process for formation of vertically isolated bipolar transistor device

Abstract

A vertically-isolated bipolar transistor occupying reduced surface area is fabricated by circumscribing an expected active device region within a first narrow trench. The first trench is filled with sacrificial material impermeable to diffusion of conductivity-altering dopant, and then isolation dopant of a conductivity type opposite to that of the substrate is introduced into the trench-circumscribed silicon region. The introduced isolation dopant is then thermally driven into the substrate, with lateral diffusion of isolation dopant physically constrained by the existing first narrow trench. Epitaxial silicon is then formed over the substrate, with polysilicon formed in regions overlying the filled narrow trench. A second, wider trench encompassing the first trench is etched to consume epitaxial silicon, polysilicon, and the sacrificial material. The second trench is then filled with dielectric material. Base and emitter structures are formed in the conventional manner within the trench-circumscribed silicon. Constraint of lateral diffusion of isolation-type dopant by the first trench reduces lateral dimensions of the isolation region and of the overall device. The smaller device area permits enhanced device packing density and reduces parasitic capacitance arising between the isolation region and the substrate.