The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 30, 2001
Filed:
Aug. 07, 1998
Tadato Yamagata, Hyogo, JP;
Akira Yamazaki, Hyogo, JP;
Shigeki Tomishima, Hyogo, JP;
Yoshio Yukinari, Hyogo, JP;
Makoto Hatakenaka, Hyogo, JP;
Atsushi Miyanishi, Hyogo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
Subbanks are arranged in four regions of a DRAM macro having a rectangular shape, bank control circuits are arranged in a prescribed region between these subbanks, and internal read/write data buses are arranged in a region different from the region where the bank control circuits are arranged. Since there is no crossing of the bank control circuits and the internal read/write data buses, the bank control circuits can be efficiently arranged to reduce the layout area. Accordingly, a semiconductor integrated circuit device including multi-bank memories which operates stably at high speed can be provided without increase of an area occupied by a chip.