The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 30, 2001

Filed:

Dec. 08, 1998
Applicant:
Inventors:

William H. Davenport, Hillsboro, OR (US);

Andy Turudic, Hillsboro, OR (US);

Assignee:

TriQuint Semiconductor, Inc., Hillsboro, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/762 ;
U.S. Cl.
CPC ...
H03K 1/762 ;
Abstract

A multiplexer includes a first input device that receives a first input signal and a first select signal. When the first select signal has a first state, the first input device generates a first voltage at a first node in response to the first input signal. When the first select signal has a second state, the first input device generates a first reference voltage at the first node. A second input device receives a second input signal and a second select signal related to the first select signal. When the second select signal has a first state, the second input device generates a second voltage at a second node in response to the second input signal. When the second select signal has a second state, the second input device generates a second reference voltage at the second node. A first output buffer has an input terminal coupled to the first node and an output terminal coupled to an output node. The first output buffer tracks the first voltage at the output terminal, and presents a high impedance at the output terminal when the first reference voltage is present at the first node. A second output buffer has an input terminal coupled to the second node and an output terminal coupled to the output node. The second output buffer tracks the second voltage at the output terminal, and presents a high impedance at the output terminal when the second reference voltage is present at the second node.


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