The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2001
Filed:
Jun. 09, 1999
Ganesh Lakshminarayana, Plainsboro, NJ (US);
Anand Raghunathan, Plainsboro, NJ (US);
Kamal S. Khouri, Princeton, NJ (US);
Niraj K. Jha, Princeton, NJ (US);
NEC Corporation, Tokyo, JP;
Abstract
A method for designing a circuit with reduced power consumption using a Common-Case Computation (CCC) based design. The method comprising identifying a set of common case computations from a schedule of the circuit, designing add on common detection circuit that detects the set of common case computations, designing add on common case execution circuit that executes the set of common case computations; and integrating the add on circuitry with the original circuit. A circuit design system for optimizing a circuit for power management comprising: a simulator for simulating a schedule with input traces based on a given RTL design, schedule and typical input traces; a state sequence identifier for identifying promising state sequence patterns from simulated schedules; a behavior extractor for extracting behavior corresponding to each identified state sequences; a pattern selector for choosing a best pattern; a synthesizer for synthesizing common case circuitry; and an output generator for integrating common case circuitry with an original circuit.