The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2001
Filed:
Apr. 10, 2000
Applicant:
Inventor:
Hideaki Nagaoka, Hyogo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/100 ;
U.S. Cl.
CPC ...
G11C 1/100 ;
Abstract
In an SRAM, a breaking circuit includes a P channel MOS transistor connected between the source of an N channel MOS transistor, which forms a bit line load, and one end of a bit line, and an inverter to supply the gate of the P channel MOS transistor with an inverted signal of a signal which appears at the one end of the bit line. If the bit line is short-circuited with a line of a ground potential and is defective, the P channel MOS transistor is rendered non-conductive, thereby preventing current leakage from a line of a power supply potential through the defective bit line to the ground potential line. Therefore, current consumption is reduced.