The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2001
Filed:
May. 06, 1999
Andrew Bishop, Shewsbury, MA (US);
Eduardo G. Veiga, Sunnyvale, CA (US);
Maxtor Corporation, Longmont, CO (US);
Abstract
An all digital timing loop is employed in a hard disk drive read channel for improved timing performance. Synchronizing the read channel to a sinewave preamble pattern at the beginning of a servo or data read operation is accomplished by first determining an accurate initial estimate of phase angle, and loading that phase value into the digital phase lock loop phase interpolator without having to halt and restart the sample clock. The timing loop synchronizes to the preamble input pattern very quickly so that timing overhead is reduced. The initial phase estimate is formed by accumulating even and odd ADC samples over a selected integration period, and using those values to access an arctan lookup table. Since ratios of even and odd ADC samples are used, gain variations and other analog tolerance issues are avoided.