The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2001
Filed:
Nov. 13, 2000
Burkhard Dick, Hamburg, DE;
U.S. Philips Corporation, New York, NY (US);
Abstract
A rectifier circuit is described, which comprises an arrangement of a first, a second and a third transistor, emitters of said transistors being coupled together at a first junction point and to a terminal of a first constant current source and in which arrangement collectors of the first and the second transistor are coupled together at a second junction point, a current mirror arrangement having a predetermined mirror ratio, an input of said current mirror being coupled to the second junction point and an output of said current mirror being coupled to a collector of the third transistor at a third junction point, wherein an input voltage, by which the collector-emitter currents of the first and/or the second transistor are controllable, can be supplied to the rectifier circuit bia bases of the first and/or the second transistor, while an output voltage can be taken from the base of the third transistor of the rectifier circuit and the output voltage at least substantially corresponds to the rectified input voltage, and the first, the second and the third transistor have predetermined emitter regions. To provide a rectifier circuit of a simple structure, ensuring an at least substantially linear signal processing also in the range of its working point, the rectifier circuit according to the invention comprises a complementary current stage, which is controllable by the output voltage and supplies at least a complementary current to the input and/or output of the current mirror arrangement, said complementary current corresponding for all values of the output voltage at least substantially to the lower value of the collector-emitter currents of the first and the second transistor.