The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 23, 2001
Filed:
Dec. 15, 1999
Naoki Kurihara, Kyoto, JP;
Jun Iida, Kyoto, JP;
Rohm Co., Ltd., Kyoto, JP;
Abstract
A delay time control circuit comprises a delay circuit composed of 2,series-connected unit delay circuits each including a pair of series-connected, first and second inverters, where n is an integer equal to or more than 2, buffer circuits each connected to an output of each of the first and second inverters of the unit delay circuits of the delay circuit, 2,first connection lines each connecting between outputs of adjacent ones of the buffer circuits connected to the second inverters and 2,second connection lines each connecting between adjacent ones of the first connection lines. In response to an input signal input to the first inverter of first one of the unit delay circuit, an output signal delayed with respect to the input signal is obtained through one of the first connection lines and one of the second connection lines.