Semiconductor device and manufacturing method thereof

Abstract

In a MISFET, areas where a channel surface of a channel region is inverted by a first gate voltage and areas where the channel surface is inverted by a second gate voltage are provided in the channel region of the MISFET in plane as components thereof. The channel region,having a first impurity concentration determined by a surface concentration of a P-type semiconductor substrate and a channel region,having a second impurity concentration determined by doping an impurity to the region selected by a pattern,of a mask for doping impurity by ion implantation and others are provided in a channel region of an N-type MOSFET on the P-type semiconductor substrate. The channel region,having the first impurity concentration and the channel region,having the second impurity concentration are divided into a plurality of plane shapes. The channel region of the same MOSFET may be structured by the plurality of plane shapes having the plurality of impurity concentrations as described above and a threshold voltage of the MOSFET may be readily set to a desired value in response to a plane area ratio of the area having the first impurity concentration and the area having the second impurity concentration, allowing to realize a high performance semiconductor integrated circuit device at low cost.