Semiconductor storage device with block writing function and reduce power consumption thereof

Abstract

In a system using a microprocessor including a cache memory, a specific memory cell row including at least one row of memory cells is provided to a cache memory cell array of the cache memory so as to be used as a write back buffer. When data is to be saved in the specific memory cell row (write back buffer), the memory cells aligned in one row in the cache memory cell array are selected by an arbitrary word line, and all the data to be saved are simultaneously written in the specific memory cell row (write back buffer) through bit line pairs in a batch. Therefore, since the data to be saved can be written in the specific memory cell row (write back buffer) without using a data bus, the number of accesses to be made to the cache memory can be decreased. As a result, the throughput can be improved and the power consumption of the microprocessor can be decreased. In addition, since the write back buffer is constituted by the specific memory cell row, the chip area can be decreased.