The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2001
Filed:
Sep. 11, 1998
Applicant:
Inventors:
Chwen-Jye Ju, Vancouver, WA (US);
Steven B. Sidman, Vancouver, WA (US);
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/500 ;
U.S. Cl.
CPC ...
G06F 1/500 ;
Abstract
A DSP system is provided for performing FFT computations with low latency by parallel processing of complex data points through a plurality of butterfly FFT execution units. The system simplifies the circuitry required by employing a single address generator for all of the memory units coupled to like ports on each execution unit. All RAM's connected to, for example, the A ports of a plurality of DSP's will be addressed by a single address generator. Similarly, all RAM's connected to the B ports of a plurality of DSP's will be addressed by a single address generator. Simple one-port RAM memory is suitable for use with the invention.