The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 16, 2001

Filed:

Aug. 02, 1999
Applicant:
Inventors:

Devlin M. Gualtieri, Ledgewood, NJ (US);

Robert E. Kollmyer, Bridgewater, NJ (US);

Assignee:

Honeywell International Inc., Morristown, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 3/302 ;
U.S. Cl.
CPC ...
G01R 3/302 ;
Abstract

A multi-axis magnetometer is provided having three magnetic field sensing circuits for sensing a magnetic field along the X, Y and Z axes. Each magnetic field sensing circuit includes an operational amplifier and a bridge chip having at least one electrical conductor. The operational amplifier is electrically connected to the at least one electrical conductor of the bridge chip for receiving a portion of a current flowing through the at least one electrical conductor. The operational amplifier provides an output voltage based on a magnitude of the portion of the current flowing through the at least one electrical conductor. The multi-axis magnetometer further includes a voltage regulator for providing an operating voltage. A method is also provided for fabricating the multi-axis magnetometer which includes the steps of providing at least one bridge chip having at least one electrical conductor on a motherboard; providing at least one operational amplifier to the motherboard; electrically connecting the at least one electrical conductor to the at least one operational amplifier; providing at least one bridge chip having at least one electrical conductor on a daughterboard; providing at least one operational amplifier to the daughterboard; electrically connecting the at least one electrical conductor of the at least one bridge chip on the daughterboard to the at least one operational amplifier on the daughterboard; and attaching the daughterboard to the motherboard.


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