The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2001
Filed:
Aug. 18, 2000
Rao Venkateswara Annapragada, San Jose, CA (US);
Philips Electronics No. America Corp., New York, NY (US);
Abstract
A method for depositing a liner dielectric on a semiconductor substrate provides for sufficient adhesion of low dielectric constant spin-on materials among metal layers in sub-micron processes. In an example embodiment, a method for adhering MSQ provides for a liner oxide on an aluminum alloy layer on a semiconductor substrate. First, the substrate is placed into a PECVD environment. A gas mixture of trimethylsilane and N,O is introduced into the PECVD environment at a trimethylsilane-to-N,O ratio of about 1:20 to 1:30. The gas mixture is reacted to deposit an oxide liner of a predetermined thickness. Adjusting the gas mixture trimethylsilane-to-N,O ratio to about 1:3 to 1:7 over the course of about 5 to 20 seconds, and sustaining the reaction thereof, deposits a methyl doped oxide.