The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2001
Filed:
Jan. 11, 2000
Toshio Sasaki, Mizuho, JP;
Yoshihiko Yasu, Koganei, JP;
Kazumasa Yanagisawa, Kokubunji, JP;
Yuji Tanaka, Kokubunji, JP;
Toshiaki Takahira, Kodaira, JP;
Yasuto Igarashi, Kodaira, JP;
Mariko Ohtsuka, Kokubunji, JP;
Yasunobu Aoki, Tachikawa, JP;
Other;
Abstract
A DRAM module is applied to the system LSI which is provided with a standby mode for suppressing the whole operation thereof and an operation standby mode which permits at least the DRAM module to operate but suppresses the operation of other circuits. The above-mentioned modes as well as a substrate bias control technology are applied to the CMOS system LSI that operates on a low voltage. The system LSI is controlled to hold or not to hold data, enabling a memory of a large capacity to be mounted and consuming a sufficiently decreased amount of electric power.