Nonvolatile semiconductor memory device

Abstract

A virtual grounded type EEPROM including a memory cell array includes a plurality of memory cells arranged in a matrix. A control gates of the memory cells of the same row are connected to one of word lines. The adjacent two memory cells of the same row are connected such that a drain of one of them is connected to a source of the other. The source and drain of the adjacent two memory cells are connected to one of bit lines. A row decoder selects one of the word lines and a column decoder selects one of the bit lines. A program circuit applies a high voltage to the drain of a selected memory cell. The row decoder determines whether a high voltage should be applied to the selected word line. The row decoder also determines whether or not to permit the charge storage layer to store charges. The data programming is executed such that data programming for the memory cells of one column is completed first and then data programming for the memory cells of an adjacent column is started, and such that data programming makes progress from the memory cells at one end of each memory cell array to the memory cells at the other end of the memory cell array.