The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2001
Filed:
Mar. 08, 2000
El-Badawy Amien El-Sharawy, Gilbert, AZ (US);
Majid M. Hashemi, San Jose, CA (US);
National Scientific Corporation, Phoenix, AZ (US);
Abstract
A static RAM memory cell (,) uses cross-coupled enhancement mode, N-channel MOS drive transistors (,) to form a bistable flip-flop. A load circuit (,) couples between I/O ports (,) of the drive transistors (,) and Vcc. For each drive transistor (,), the load circuit includes a depletion mode, N-channel MOS load transistor (,) and a forward biased tunnel diode (,). The drain and gate of the load transistor (,) couple across the anode and cathode of the tunnel diode (,) so that the forward voltage (V,) of the tunnel diode (,) controls the V,transfer curve (,) of the load transistor. The tunnel diode (,) may be formed at a junction between a mono-crystalline silicon layer (,) at a region (,) which also serves as a source or drain of a transistor (,) and a poly-crystalline silicon layer (,). The poly-crystalline silicon layer (,) also serves as a non-metallic, conductive interconnection (,) to save space.