The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 09, 2001
Filed:
Feb. 11, 1998
Yoshiyuki Matsunaga, Kamakura, JP;
Shinji Ohsawa, Ebina, JP;
Nobuo Nakamura, Fuchu, JP;
Hirofumi Yamashita, Tokyo, JP;
Hiroki Miura, Yokohama, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
An MOS-type solid-state imaging apparatus includes unit cells arranged in a two-dimensional matrix, each unit cell being constituted by a photodiode, an amplification transistor having a gate to which an output from the photodiode is input, a vertical selection transistor connected in series with the amplification transistor, and a reset transistor connected between the drain and gate of the amplification transistor to discharge the signal from the photodiode, a plurality of vertical address lines connected to the gates of the vertical selection transistors and arranged in a row direction, a vertical address circuit for driving the vertical address lines, a plurality of vertical signal lines arranged in a column direction in which currents are read out from the amplification transistors, a plurality of load transistors each connected to one end of a corresponding one of the vertical signal lines, a plurality of horizontal selection transistors each connected to the other end of a corresponding one of the vertical signal lines, a horizontal address circuit for sequentially supplying selection pulse signals to the gates of the horizontal selection transistors, and a horizontal signal line for reading out signal currents from the vertical signal lines through the horizontal selection transistors.