The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2001

Filed:

Apr. 23, 1996
Applicant:
Inventors:

Seung-hun Lee, Suwon, KR;

Tae-jin Kim, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/700 ; G11C 1/400 ;
U.S. Cl.
CPC ...
G11C 1/700 ; G11C 1/400 ;
Abstract

A semiconductor memory device for a package-state voltage test has a plurality of bonding pads that are electrically connected to an external device in a package state, at least one internal DC voltage generator, at least one switch connected between one of the bonding pads and the internal DC voltage generator. The switch is on during a test mode and is off during a normal mode. The switch controller is connected between at least two of the plurality of bonding pads and serves to control the switch in response to an external switching signal in the test mode. Because of this design, a number of DC voltage tests can be performed without increasing chip size since a general control pad also serves as a DC voltage test pad.


Find Patent Forward Citations

Loading…