The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 02, 2001
Filed:
Dec. 17, 1998
Jeroen H. C. J. Stessen, Eindhoven, NL;
Antonius H. H. J. Nillesen, Eindhoven, NL;
U.S. Philips Corporation, New York, NY (US);
Abstract
An output timebase corrector converts orthogonal sampled video (VS) into asynchronous sampled video (VOS) with asynchronous sample values occurring at clock instants (TC) of a clock signal (CLK). The asynchronous sampled video (VOS) is displayed on a display screen of a display device (DD). A discrete time oscillator (DTO) of a time-discrete phase-locked loop (PLL) supplies a time base signal (OS). The time-discrete phase-locked loop (PLL) determines a phase difference (PE) between the time base signal (OS) and reference instants (FB) indicating a timing of a line deflection of the display device (DD) to obtain the time base signal (OS) being locked to the reference instants (FB). The time base signal (OS) controls a sample rate converter (SRC) such that the asynchronous video values (VOS) which occur at the clock instants (TC) are interpolated from the orthogonal sampled video (VS) by the sample rate converter (SRC) such that the video signal is displayed on the correct position on the display screen. In the output timebase corrector according to the invention all circuits are clocked by clock signals (CLK) originating from one and the same clock generator (OSC).