The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2001

Filed:

Mar. 30, 2000
Applicant:
Inventors:

Chin-Chieh Chao, Hsinchu, TW;

Tsen-Shau Yang, Hsinchu, TW;

Keh-Yung Tso, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 1/900 ; G11C 7/00 ; H03F 3/45 ;
U.S. Cl.
CPC ...
G01R 1/900 ; G11C 7/00 ; H03F 3/45 ;
Abstract

The present invention discloses a single-ended sense amplifier including an output circuit having an output terminal for indicating a state of a bitline node. In addition, a noise margin circuit; and an n-channel transistor are provided for coupling or decoupling an input terminal of the output circuit with the bitline node. The variable logic-threshold inverter has a larger logic threshold voltage in response to a lower voltage level of a precharge signal and a smaller logic-threshold voltage in response to a higher voltage level of the precharge signal. The difference between the two logic-threshold voltages represents the possible noise margin. Furthermore, a power down control circuit is provided to be coupled to the bitline node for reducing the static power consumption of the single-ended sense amplifier. The single-ended sense amplifier according to the present invention provides a higher and adjustable noise margin and occupies a smaller area on a semiconductor wafer.


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