The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2001

Filed:

Feb. 01, 1999
Applicant:
Inventors:

Franciscus G. M. De Jong, Eindhoven, NL;

Mathias N. M. Muris, Eindhoven, NL;

Rodger F. Schuttert, Eindhoven, NL;

Johannes De Wilde, Eindhoven, NL;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01H 3/102 ; G01R 1/900 ; G01R 2/728 ; G01R 2/726 ;
U.S. Cl.
CPC ...
H01H 3/102 ; G01R 1/900 ; G01R 2/728 ; G01R 2/726 ;
Abstract

The invention relates to a method of testing interconnections in integrated circuit (IC) assemblies. Hereto, a test signal is applied to an IC pin (,) providing an input terminal to the interconnection. In known methods, such as the boundary-scan method, a response signal is measured on an output terminal of the interconnection, provided by a further IC pin. According to the invention, however, a response signal is evaluated which is generated on the same terminal (,) as to which the test signal is applied. This has the advantage that the method of the invention can be applied when only one end of the interconnect to be tested can be supplied with appropriate test hardware. The method is particularly suited for testing a capacitance (,) between an IC pin (,) and a supply line, e.g. a ground line.


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