The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 18, 2001

Filed:

Sep. 29, 2000
Applicant:
Inventor:

Jae Kap Kim, Kyoungki-do, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/122 ;
U.S. Cl.
CPC ...
G11C 1/122 ;
Abstract

A ferroelectric random access memory including a plurality of bit lines extending in one direction, a plurality of word lines extending in another direction perpendicular to the one direction, and a plurality of unit cells arranged in an M×N array while being connected to associated ones of the lines. The unit cells are grouped into a plurality of unit cell groups. A dummy cell group comprises a plurality of dummy cells that are connected to an associated one of the bit lines of an optional position on the associated bit line. A first switching transistor group comprises a plurality of switching transistors that serve to switch a connection among associated ones of the unit cells on one of the bit lines corresponding to an associated one of the dummy cells in response to a control signal externally applied thereto, and a second switching transistor group comprises a plurality of switching transistors that serve to erase data stored in an associated one of the dummy cells in response to a control signal externally applied thereto. Respective capacitors of the dummy cells are made of a dielectric film having no spontaneous polarization characteristic.


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