Static random-access memory device having a local interconnect structure

Abstract

The present invention provides a static random-access memory (SRAM) device that comprises a substrate having an insulator and a gate formed thereover, where the insulator electrically insulates the gate from the substrate, and a local conductive layer that is formed on the gate structure and that extends from the gate and onto the substrate. The local conductive layer is connectable to a conductive interconnect structure to connect the gate electrically to an other portion of the SRAM device. The SRAM device, in one embodiment, is part of a complementary metal oxide semiconductor (CMOS). However, it will be appreciated by those who are of ordinary skill the art that the present invention may be used in various types of metal oxide semiconductors and similar semiconductor devices in general. Therefore, in an aspect of the present invention, there is provided a local conductive interconnect structure that provides a electrical path to which the gate may be electrically connected to other portions of the SRAM device without the need of multiple interconnect structures found in prior art devices. Thus, the overall cell size of the SRAM device may be substantially decreased such that it can be used in applications that require smaller cell sizes.