The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2001
Filed:
Feb. 20, 1998
Guy Dupenloup, Marly-le-Roi, FR;
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A method of fabricating an integrated circuit chip (IC), said method comprising the steps of defining the IC at the RTL code level, translating said RTL code into a generic netlist description, generating logic synthesis tool scripts based on said generic netlist description, and executing said logic synthesis tool scripts to synthesize the RTL code. The step of generating logic synthesis tool scripts comprises the substeps of identifying hardware elements and structure of the IC design, determining interrelationships between said identified hardware elements and structures, and generating logic synthesis tool scripts to synthesize said identified hardware elements to netlists as a function of said hardware elements and said interrelationships.