The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2001
Filed:
Jul. 21, 1998
Hartvig Ekner, Holte, DK;
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A circuit and method is provided which allows a microprocessor to implement speculative load instructions with implicit exception checking. In one embodiment of the method, exception information is generated in response to a memory access exception caused by a speculative load instruction for loading one of a plurality of first registers with data from memory. The exception information, once generated, is stored within one of a plurality of second registers. Each of the second registers corresponds to at least one of the plurality of first registers and is configured to store exception information. Thereafter, an instruction for operating on data stored in a first register is received and decoded by the microprocessor. In response, a second register corresponding to the first register is accessed. If this second register contains exception information, then the microprocessor initiates the exception routine. On the other hand, if the second register does not contain exception information, then the instruction for operating on data contained in the first register is executed.