The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 11, 2001

Filed:

Jan. 24, 2000
Applicant:
Inventors:

Jan Johansson, Upplands Väsby, SE;

Per Ericsson, Sundbyberg, SE;

Nils Af Ekenstam, Solna, SE;

Henrik Sjödén, Morgan Hill, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 3/500 ; H01L 3/700 ; H03K 3/42 ; H03K 1/778 ;
U.S. Cl.
CPC ...
H01L 3/500 ; H01L 3/700 ; H03K 3/42 ; H03K 1/778 ;
Abstract

To eliminate the temperature dependency of the quiescent current of a power transistor (,), the gate bias voltage of the power transistor (,) is controlled by means of the output voltage of a biasing transistor (,) residing on the same silicon chip as the power transistor (,), and by interconnecting the gate (G,) and drain (D,) of the biasing transistor (,) and feeding it with a constant current (IB) from external circuitry.


Find Patent Forward Citations

Johansson, Jan. (2001). Gate biasing arrangement to temperature compensate a quiescent current of a power transistor (U.S. Patent No. 6288596). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6288596

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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