The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 11, 2001
Filed:
Mar. 22, 2000
Tamrat Akale, Torrance, CA (US);
Robert C. Allison, Rancho Palos Verdes, CA (US);
Lawrence Dalconzo, Los Angeles, CA (US);
James M. Harris, Encinitas, CA (US);
Raytheon Company, Lexington, MA (US);
Abstract
A compact thick film substrate for filtering, shielding, and routing multiple lines of dc and control signals between isolated ports of a microwave integrated circuit. The substrate circuit includes a dielectric substrate having upper and lower substrate surfaces and first and second side surfaces. A first ground plane layer is formed on the upper substrate surface. A first thick film assembly is formed on the first ground plane layer, and includes a first thin dielectric layer, a first set of thin conductive traces formed on the thin dielectric layer and onto the first and second side surfaces terminating in a first set of edge trace pads formed on the first side surface and a second set of edge trace pads formed on the second side surface, a second thin dielectric layer formed over the upper substrate surface covering the first set of traces such that the traces are sandwiched and shielded between adjacent first surfaces of the first and second dielectric layers, and a second ground plane formed on a second surface of the second dielectric layer. The first and second sets of trace pads are exposed for connection to adjacent circuitry. A second thick film assembly is formed on the lower surface of the substrate to provide third and fourth sets of trace pads for connection to the adjacent circuitry.