The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2001

Filed:

May. 30, 2000
Applicant:
Inventors:

Peter Schrögmeier, München, DE;

Stefan Dietrich, Türkenfeld, DE;

Sabine Schöniger, Miesbach, DE;

Christian Weis, München, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract

Each redundant unit of an integrated memory device is assigned respective programmable elements, comparison units, a code converting unit, a logic unit and a multiplexer. Each multiplexer has a first switching state, in which it connects outputs of the first comparison units to first inputs of the logic unit, and a second switching state, in which it connects outputs of the code converting unit to the first inputs of the logic unit. In the second switching state of the multiplexers, each redundant unit is assigned a different address in the unprogrammed state of the programmable elements. Therefore, redundant units can be selected individually for test purposes.


Find Patent Forward Citations

Schrögmeier, Peter. (2001). Integrated memory having redundant units of memory cells, and test method for the redundant units (U.S. Patent No. 6285605). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6285605

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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