The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 04, 2001

Filed:

Sep. 14, 1999
Applicant:
Inventor:

Paul C. Yu, Coppell, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/38 ; H03M 1/34 ;
U.S. Cl.
CPC ...
H03M 1/38 ; H03M 1/34 ;
Abstract

A multi-stage analog-to-digital converter (“ADC”) for converting an analog input signal to a series of digital values, each having a first plurality of bits, representing the voltage levels of the analog input signal at a corresponding series of sample times. The ADC includes a plurality of analog-to-digital converter stages connected serially in pipeline configuration. One or more of such stages includes an analog-to-digital subconverter, providing a second plurality of bits of the digital value, where the second plurality is smaller than the first plurality, the analog-to-digital subconverter including a plurality of analog-to-digital subconverter substages connected serially in pipeline configuration. Each such subconverter substages provides one or more bits of the second plurality of bits. The nested approach of this invention allows an increased resolution in the first stage of the pipeline which has the benefit of avoidance of capacitor trimming, a more efficient use of the comparators and other circuit components, a relaxation in the comparator offset requirements, and satisfy kT/C noise requirements more easily in submicron low-voltage ADC's.


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