The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2001
Filed:
Feb. 10, 1998
Gerard Chauvel, Antibes, FR;
Marion C. Lineberry, Dallas, TX (US);
Matthew A. Woolsey, Plano, TX (US);
Michael McMahon, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A cache memory architecture,, which may be, for example, a set associative cache memory, has a cache controller (,) with an internal register for storing the address of the active line currently latched in the output buffer of the high speed cache data array (,) which stores the cached data values from the main memory. If a memory access request specifies an address which would be contained in the active line, the cache look-up mechanisms are disabled and the data is taken from the output buffer. The efficiency of the cache can be increased by linking a program to memory such that the number of cache lines used by one or more program loops are minimized.