The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2001
Filed:
Dec. 03, 1998
Barry J. Rubin, Croton-on-Hudson, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A methodology and circuit modeling structure for analyzing the packaging of electrical circuits and determining electrical circuit properties, e.g., inductance, capacitance, of circuits and circuit structures found in VLSI chips, PC cards, boards, microwave circuits, etc. The methodology and circuit modeling structure includes modifying the original signal line structure in the circuit to be analyzed by including a shadow line structure in the analyzed circuit and locating the shadow line structure between a ground plane structure and an associated signal line structure at an infinitesimal distance above the ground plane. Additionally, for each shadow line structure, there is provided a first via structure for connecting a first end of said shadow line to the ground plane and, a second via structure connecting a second end of the shadow line to the ground plane. The modified shadow line structure is readily implemented in 3D circuit package analysis programs and provides a computationally efficient way to analyze complex types electrical/electronic/packaging circuits and structures.