The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2001
Filed:
Mar. 06, 1995
Xiao Sun, Austin, TX (US);
Carmie A. Hull, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
Unique Input/Output Sequence (UIO) Sets are constructed to test conformance of a Machine (,) against a Finite State Machine (FSM) model (,). Unique Input/Output Sequence (UIO) Sets (,) uniquely identify FSM model states and may be Forward Unique I/O Sequences (FUIO), Backward Unique I/O Sequences (BUIO), Forward Unique I/O Sequence Sets (FUIOset), and/or Backward Unique I/O Sequence Sets (BUIOset). FSM model (,) state transitions are selected as Edges-Under-Test (EUT). A Set of EUT UIO Sets is identified comprising UIO Sets that uniquely identify either the source or destination FSM model (,) state of an EUT. One member is selected from the Set of EUT UIO Sets for a particular EUT, and each member of this UIO Set is concatenated with the EUT to form Test Subsequences (TS). These Test Subsequences are used to verify that the corresponding FSM transitions are successfully traversed by a Machine Under Test (MUT).