The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 28, 2001

Filed:

Sep. 14, 1999
Applicant:
Inventors:

Hyun Lee, Allentown, PA (US);

Michael J. Hunter, Mertztown, PA (US);

Assignee:

Agere Systems Guardian Corp., Orlando, FL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/02 ;
U.S. Cl.
CPC ...
G11C 7/02 ;
Abstract

The invention is a method and apparatus for minimizing voltage swing on the BIT and {overscore (BIT)} lines of a static random access memory (SRAM), thus minimizing precharge time and READ time for the SRAM. In accordance with the invention, an enhanced sense amplifier is provided in the last column of the memory array. The enhanced sense amplifier detects when the differential voltage between the BIT and {overscore (BIT)} lines exceeds the minimum detectable threshold of the sense amplifier. In response to that event, it asserts a feedback line to the READ control circuitry which halts the read operation essentially as soon as the differential voltage between the BIT and {overscore (BIT)} lines reaches the minimum differential voltage detectable by the sense amplifier. The technique is adaptive and assures both accurate operation and minimal precharge and read access times across variations in temperature and other environmental conditions.


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