The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2001
Filed:
Aug. 04, 2000
Applicant:
Inventor:
Yasunari Kawaguchi, Kanagawa, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 1/604 ;
U.S. Cl.
CPC ...
G11C 1/604 ;
Abstract
A pipe-line processing/burst read SRAM generates an echo clock signal concurrently with the output timing of read data. The memory cell array includes a pair of memory cells storing a high level data and a low level data. The echo clock signal is generated by reading data from the pair of memory cells and alternately outputting the read data. The timing of the echo clock signal is concurrent with the output timing of read data from a data output section which reads data from a memory cell specified by a read address.
Kawaguchi, Yasunari. (2001). Sram generating an echo clock signal (U.S. Patent No. 6278637). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6278637
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile