The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2001

Filed:

Nov. 30, 2000
Applicant:
Inventor:

Hideki Hara, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/604 ;
U.S. Cl.
CPC ...
G11C 1/604 ;
Abstract

There is provided a storage method of a semiconductor storage apparatus provided with a source/drain area formed in a semiconductor substrate, a floating gate formed on a top layer of the area via a gate insulating film, and a control gate formed on the floating gate via an interlayer insulating film, the method comprising steps of: applying a predetermined positive voltage to a bit line connected to the drain area and a word line connected to the control gate, injecting an electron to the floating gate, and writing data to a selected memory cell; applying a predetermined negative voltage to a gate line, applying the predetermined positive voltage to a common source line connected to the semiconductor substrate or the source area, discharging the electron accumulated in the floating gate of the selected memory cell, and performing data erasing; and after the data erasing, applying the predetermined positive voltage necessary for injecting the electron to the floating gate from a channel area in the vicinity of the source area to the common source line, and performing write-back of the memory cell erased excessively.


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