Reference memory cell initialization circuit and method

Abstract

A circuit and method for initializing a reference memory cell. The circuit comprises a first voltage source for supplying a first voltage to a drain of the reference memory cell in a programming mode of the reference memory cell, a second voltage source for supplying a second voltage to a control gate of the reference memory cell in the programming mode or a read mode of the reference memory cell, a third voltage source for supplying a third voltage to a source of the reference memory cell, a fourth voltage source for supplying a fourth voltage to the source of the reference memory cell in an erase mode of the reference memory cell, the fourth voltage being an erase voltage, a first switch selectively connected to the drain of the reference memory cell in response to a measure signal, for controlling a path for measuring the amount of external current flowing to the reference memory cell, a second switch connected to the source of the reference memory cell for connecting it to the third voltage source or the fourth voltage source in response to an erase control signal, and a current detector connected between the first voltage source and the drain of the reference memory cell, for starting the programming mode of the reference memory cell in response to a programming control signal.