The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2001

Filed:

Jul. 01, 1998
Applicant:
Inventors:

Hidenori Kuwajima, Yamatokoriyama, JP;

Toshio Matsumoto, Nara, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/316 ;
U.S. Cl.
CPC ...
G06F 1/316 ;
Abstract

The present invention relates to a display memory control apparatus which can shorten a waiting time in making an access to a VRAM from a CPU without making large a circuit scale and causing an increase of power consumption. A data width of a VRAM is previously set to plural times as much as a data bus width of a CPU. A write data from the CPU is temporarily stored in a pre-buffer, and is transferred to one of data buffers included in a write buffer. The data buffer is specified by a low-order address. A VRAM control circuit can write all data or data of arbitrary combinations from data buffers into an address of VRAM specified by a high-order address buffer by one-time access.


Find Patent Forward Citations

Kuwajima, Hidenori. (2001). Display memory control apparatus (U.S. Patent No. 6278467). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6278467

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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