The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2001
Filed:
Nov. 10, 1999
Applicant:
Inventors:
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L 7/06 ;
U.S. Cl.
CPC ...
H03L 7/06 ;
Abstract
A clock circuit is provided including a clock supply circuit that can cease clock supply according to a control signal, a PLL circuit maintaining clock synchronization, and a dummy circuit. Synchronization of the internal clock signal is maintained by the PLL circuit and the dummy circuit even in a standby state. In returning to an active state from a standby state, an unstable clock signal arising from unstable locking of the PLL circuit will not be applied to the internal circuit. Therefore, the information in the latch circuit in the internal circuit can be maintained.