The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2001

Filed:

May. 01, 2000
Applicant:
Inventors:

Steven A. Guccione, Austin, TX (US);

Delon Levi, Santa Clara, CA (US);

Daniel J. Downs, Longmont, CO (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/38 ; H03K 1/9177 ;
U.S. Cl.
CPC ...
G06F 7/38 ; H03K 1/9177 ;
Abstract

Described are systems and methods that take advantage of the run-time reconfigurability of modern programmable logic devices to efficiently implement content-addressable memory (CAM) circuits. Rather than using configurable logic to compare CAM entries stored in flip-flops, a CAM in accordance with the invention uses configurable logic for both data storage and comparison. A CAM in accordance with one embodiment of the invention includes a number of programmable look-up tables on a programmable logic device collectively configured to produce a “match” signal in response to data provided on a series of data input terminals. Configuration data determines the particular pattern to which the CAM responds, so new CAM entries are introduced by configuring (or reconfiguring) one or more of the look-up tables. A processor connected to the PLD responds to new CAM entries by executing instructions that first translate the new CAM entries into configuration data and then employ the configuration data to reprogram the PLD.


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