The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2001
Filed:
Jul. 29, 1999
Hiroyuki Noji, Chigasaki, JP;
Koichi Fukuda, Yokohama, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A first bonding pad is formed on the surface of a semiconductor chip on which a semiconductor circuit is formed. A first insulating substrate is formed on the semiconductor chip, and a wiring layer is formed on the first insulating substrate. A second insulating substrate is formed on the first insulating substrate and wiring layer. A first region is formed by forming an opening in the second insulating substrate to expose part of the surface of the wiring layer. The first region and first bonding pad are connected by a wire. A second region is formed by forming an opening in the second insulating substrate to expose part of the surface of the wiring layer. In the second region, a bump is formed. Further, a third region is formed by forming an opening in the second insulating substrate to expose part of the surface of the wiring layer. The third region has at least an area necessary for the terminal of a measurement device to contact the third region in operation measurement.