The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2001
Filed:
Aug. 04, 1998
Hideshi Maeno, Tokyo, JP;
Tokuya {overscore (O)}sawa, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
In the first test mode with a shift-mode signal (SM) of “1” and a test-mode signal (TM) of “1”, supplying a comparison control signal (CMP) of “1” makes a test-valid condition. Then, a comparison result between input data (D) which becomes “0” to indicate a failure and an expected value data (EXP) (an output of a comparator (,)) and an AND-operation result between a serial input (SI) and a latch data (an output of a D-FF (,)) are given to the D-FF (,) through NAND gates (,and,), an AND gate (,) and a selector (,). With this configuration achieved is a semiconductor integrated circuit having a test circuit which allows a quick recognition of whether there is a failure or not in an internal memory circuit under test.